Towards implementing multi-channels, ring-oscillator-based, Vernier time-to-digital converter in FPGAs: key design points and construction method

摘要

For TOF positron emission tomography (TOF PET) detectors, time-to-digitalconverters (TDCs) are essential to resolve the coincidence time of the photonpairs. Recently, an efficient TDC structure called ring-oscillator-based(RO-based) Vernier TDC using carry chains was reported by our team. The methodis very promising due to its low linearity error and low resource cost.However, the implementation complexity is rather high especially when moving tomulti-channels TDC designs, since this method calls for a manual interventionto the initial fitting results of the compilation software. In this paper, weelaborate the key points toward implementing high performance multi-channelsTDCs of this kind while keeping the least implementation complexity.Furthermore, we propose an efficient fine time interpolator construction methodcalled the period difference recording which only needs at most 31 adjustmenttrials to obtain a targeted TDC resolution. To validate the techniques proposedin this paper, we built a 32-channels TDC on a Stratix III FPGA chip and fullyevaluated its performance. Code density tests show that the obtained resolutionresults lie in the range of (23 ps ~ 37 ps), the differential nonlinearity(DNL) results lie in the range of (-0.4 LSB ~ 0.4 LSB) and the integralnonlinearity (INL) results lie in the range of (-0.7 LSB ~ 0.7 LSB) for each ofthe 32 TDC channels. This paper greatly eases the designing difficulty of thecarry chain RO-based TDCs and can significantly propel their development inpractical use.